Theses›Datacentre & AI compute›Emerging non-volatile memory

Emerging non-volatile memory

Emerging non-volatile memory (MRAM, FeRAM, RRAM, PCM) displaces embedded flash and SRAM in specific sub-28nm sockets where flash cannot scale and SRAM leaks too much

  • Shut
  • $4.8B by 2035

The call, a draftMRAM and resistive RAM are replacing embedded flash where flash stops shrinking, and the foundries are building them in. The value goes to foundries and licensors, so this is a slow structural shift with little room for a new memory maker.

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Fig. 1The balance. Drivers and catalysts against restraints, each block sized by its weight; catalysts hang dashed because they have not happened yet, sized by their odds. It tips toward the restraints.
  1. D1Embedded flash stops scaling below 28nm, and Yole has embedded memory rising from about 4% of MCU shipments in 2024 to about 24% by 2030.
  2. D2Foundries are productising it: GF's 22FDX MRAM is automotive-grade since March 2026, TSMC runs 28nm resistive RAM auto-qualified, and Samsung's MRAM roadmap reaches 5nm in 2027.
  3. D3Weebit Nano has licences with Texas Instruments and onsemi, guides to at least $10M in FY26 and first royalties in FY27.
  4. R1The foundries integrate these memories themselves, so the memory layer pays licensing rates, and eMemory took 19 years to reach $123M a year.
  5. R2Analog multi-level resistive compute-in-memory drifts: one simulation took a ResNet-20 from 68% to 19% accuracy over a month, and each fix adds back converter overhead.
  6. R3The one-bit AI models that once looked like a use for resistive memory run on table-lookup logic, already shown at 5-7W on an off-the-shelf AMD FPGA.
  7. R4The oldest resistive-memory startup stopped developing its own device and now builds on TSMC's macro.
  8. C1Binary two-level cells outnumber analog multi-level designs among resistive compute-in-memory parts reaching silicon for edge inference.31 Dec 2027
  9. C2A major foundry publicly names an independent startup's resistive-memory process in its embedded-memory roadmap.31 Dec 2027
  10. C3An analog multi-level resistive compute-in-memory vendor reaches $100M of cumulative product revenue.31 Dec 2028
Rests onthe beliefs underneath
Supported by · confidence
What would prove itdated tests, open and resolved
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Fig. 2Each ring is a dated test: dashed while open, struck through when overdue, ticked or crossed once resolved.
  1. 1TetraMem's MLX200 evaluation kits on 22nm TSMC, testing whether multi-level resistive memory holds accuracy.Dec 2026 · open
  2. 2Through end-2027, the majority of ReRAM compute-in-memory parts reaching silicon for edge inference use binary/saturated two-level cells with architectural precision, not analog multi-level-conductance MVM.Dec 2027 · open
  3. 3By end-2027, at least one independent startup ReRAM process is publicly designed into a major foundry's embedded-NVM offering.Dec 2027 · open
  4. 4No analog multi-level ReRAM compute-in-memory company reaches $100M cumulative product (chip or IP) revenue by end-2028.Dec 2028 · open
  5. 5Cumulative revenue of analog compute-in-memory vendors against $100M.Dec 2028 · open
Expressionslisted, private, technologies
Private · 9 private companies, 4 of them in the US; none in continental Europe.

LAXNAR AI · Tetramem · Mythic · Floadia Corporation · Mingxin Qirui · AistarTek · InnoStar · Neo Semiconductor · Numem

6 more private companies tracked, not shown

Technologies
What changedthe record, newest first
  • 1 Oct 2026The oldest ReRAM startup now builds on TSMC's ReRAM macro instead of its own device. In embedded memory, the foundry's process tends to beat the startup's.
  • 12 Aug 2026Finished the work on emerging memory technologies as a compute device. The core prediction holds — as ordinary AI chips commoditise, value does migrate down into the special memory underneath — and you can now see exactly where it went, which is the problem. It went into memory IP licensing, where the 19-year-old leader books about $123M and the best challenger guides to $10M this year with royalties starting next year and real scale after 2030. That is a slow compounder, not a venture outcome. Two other things changed my read: researchers are settling on using the exotic memory to store the weights and ordinary memory to do the arithmetic, which moves the clever part elsewhere; and the new one-bit AI models do need new hardware, but what they need is a lookup table in plain logic, which already runs on an off-the-shelf board. One company has just got multi-level silicon back, so I am keeping a dated check on that rather than calling it finished.
  • 3 Jul 2026The most persuasive near-term framing for non-volatile compute-in-memory may not be edge MCU flash replacement but cloud inference cost: HBM stack prices are rising roughly 50% per generation and the economics of sub-$200/month inference appear increasingly difficult to close without a fundamentally different memory-bandwidth architecture. Investors who anchored the why-now to embedded-flash scaling limits at 28nm should stress-test whether the larger and faster-moving demand signal is actually in cloud/datacentre inference, and whether that changes which compute-in-memory technology and which company archetype (fabless chip vs IP licensor vs foundry process) captures the value.
3 earlier
  • 16 Jun 2026When a memory technology's market quietly switches to its boring binary version, the headline cost is not power but silicon area: you spend more cells per stored weight to buy parts that actually yield. The efficiency you appear to give up was mostly theoretical anyway, eaten by the cost of reading an analog signal back out.
  • 9 Jun 2026The quiet enabler for cheap edge AI is not a new chip but a foundry finally offering the memory: embedded MRAM is now a shipping, automotive-grade product and resistive RAM is in low-density production. That is the substrate binary in-memory-compute startups need. The open question is whether they can actually buy the process or whether it stays locked inside the foundry.
  • 4 Jun 2026When a startup's resistive-RAM process starts displacing a foundry's internal memory roadmap, the signal is manufacturing maturity, not the long-promised arrival of analog compute-in-memory: the matured process unlocks a cheaper, more boring digital path that routes around the precision problem entirely.