Physics / mechanism
Phase-change memory exploits the reversible amorphous↔crystalline transition in chalcogenide alloys—typically Ge₂Sb₂Te₅ (GST) or doped variants. A short high-current pulse (RESET) melts and quench-cools the material into high-resistance amorphous state; a longer lower-current pulse (SET) anneals it into low-resistance crystalline. Resistance contrast runs 10³–10⁴×. Multi-level cell (MLC) operation encodes 2–3 bits per cell by targeting intermediate resistance states. Endurance: 10⁸–10¹² cycles depending on cell architecture. Retention: >10 years at 85 °C for crystalline phase. Leading nodes: Intel/Micron 3D XPoint (now Solidigm), ST Microelectronics automotive PCM, IBM research targeting analogue neuromorphic arrays. Write latency ~100 ns; read ~50 ns—faster than NAND, slower than SRAM/DRAM.
Competitive landscape
PCM competes directly with NAND Flash (higher endurance, lower density penalty, better random-write), DRAM (lower cost/bit, non-volatile, but slower), and emerging NVM alternatives.
Companies using
Connected ideas
Sources
Frontier (open questions)
- Can PCM drift and endurance be tamed enough for analog-CIM volume, or does it stay a research device?
- Does PCM hold a role as storage-class memory even if PCM-CIM stalls?