PIC Packaging Stack

Cross-cuts: Photonic Systems
last updated 2026-05-30
Co-Packaged OpticsPhotonic Wire BondingGlass PhotonicsGlass InterposersHybrid Bonding (Cu-Cu)Heterogeneous Photonic IntegrationSilicon PhotonicsInP PhotonicsFibre-to-Chip CouplingPIC Packagi…

The synthesis page for “how you package a photonic IC.” Full decision brief: 2026 05 30 Pic Packaging Approaches Landscape.

The core idea — two axes, not one

“Packaging a PIC” is constantly conflated with “which PIC platform wins.” They are different axes:

  1. Platform axis — what the PIC is made of (where light is generated/modulated/detected): Silicon Photonics, InP Photonics, SiN, TFLN, polymer, glass. Covered by Photonics Material Class War / 2026 05 30 Pic Market Structure.
  2. Packaging axis — how you connect the PIC: a 4-layer stack, each layer its own contest. This page.

Silicon Photonics is the platform; Glass Photonics, Photonic Wire Bonding, Hybrid Bonding (Cu-Cu) and Co-Packaged Optics are competing answers to the packaging axis. They are mostly complementary, not rival: a SiPh die does the electro-optics, and the packaging stack gets light + power on and off it.

Why packaging is a sub-industry

Silicon’s high index contrast makes the on-chip mode ~0.5 µm vs a fibre’s ~10 µm — a ~20× mode mismatch that no glue can bridge. That, plus silicon’s lack of a native laser and its two-photon absorption at high power, generates the whole stack below. Commercially this is where the value is: packaging is ~25% of a datacom pluggable’s value, ~50% of early-CPO value; Yole sizes photonics packaging at $4.5B (2025) → $14.4B (2031), ~21.5% CAGR (2026 05 30 Pic Market Structure).

The four layers

LayerProblemCompeting approachesGlass’s role
1. Fibre→chip couplingbridge the ~20× mode mismatchedge/grating coupling · polymer Photonic Wire Bonding · glass waveguide · fibre arrays (PROFA)competes directly — the inorganic, reliability-winning option
2. Laser / light-source attachsilicon can’t laseexternal laser · flip-chip · Heterogeneous Photonic Integration · monolithic InP Photonics · micro-LEDabsent
3. Die-to-die / die-to-substratefine pitch, no optical misalignmentflip-chip bump · Hybrid Bonding (Cu-Cu) · 2.5D interposer (Glass Interposers)glass-core substrate (primes’ game)
4. System co-packagingoptics next to ASICCo-Packaged Optics vs pluggable vs LPO/LROsets timing for all above

Layer 1 is the contested, venture-relevant layer and the one the Glass Photonics cohort lives in. See the cohort screen in 2026 05 30 Pic Packaging Approaches Landscape.

The investable spine

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Connected ideas

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