Physics / mechanism
Glass interposers are passive silicon-free substrates—typically borosilicate or alumino-borosilicate glass—used to route signals between chiplets in advanced 2.5D/3D packages. Glass offers lower dielectric constant (Dk ~4–5 vs. organic ~3.5–4 but with far better dimensional stability) and near-zero CTE mismatch with silicon (~3 ppm/°C). Through-glass vias (TGVs) are laser-drilled or etched to ≤10 µm diameter with aspect ratios up to 10:1, enabling wiring densities approaching silicon interposers at lower cost. Insertion loss at 50 GHz is typically 0.1–0.3 dB/cm. Intel’s EMIB and Corning/Absolics are pushing panel-scale glass at 510×515 mm. Timeline (corrected 2026-05-30): AI/HPC volume is a 2027–2030 story, not 2025–2026 — Intel guides complete glass-substrate solutions to market by end-decade and demoed its first EMIB+glass-core combination only in Jan 2026 (2026 05 30 Intel Glass Substrates Program); ex-Intel/GF expert Pooya Tadayon independently dates volume to 2027–2030 (2026 04 23 Call Pooya Tadayon). For the photonic-active sibling of this electrical-substrate technology, see Glass Photonics.
Competitive landscape
Silicon interposers (TSMC CoWoS) remain the benchmark for density but cost $200–400/tile and require fab capacity. Organic substrates (ABF, Ajinomoto) are cheap but dimensionally unstable at fine pitch. Glass sits between: better flatness and RF than organic, lower cost and easier panel-scale than silicon. Photonic integration is an emerging differentiator—glass is optically transparent, enabling hybrid electronic-photonic interposers organic and silicon cannot match.
Companies using
Connected ideas
Sources
Frontier (open questions)
- To be added.