Silicon photonics builds optical circuits in the silicon device layer of CMOS wafers, and is now shipping as commercial foundry platforms whose remaining weaknesses (no Pockels effect, no native laser) are being patched by wafer-scale heterogeneous integration of lithium niobate, III-V and electronic chiplets.
Summary
Silicon photonics (SiPh) means patterning waveguides, splitters, resonators and detectors into the silicon layer of a silicon-on-insulator wafer using the same lithography, etch and deposition toolset as CMOS logic. The canonical geometry is a 220 nm thick silicon layer, used both for single-mode strip waveguides and, in recent work, for freely propagating slab beams steered by etched total-internal-reflection mirrors that avoid sidewall-roughness loss altogether. Germanium grown on silicon supplies the photodetectors, and in monolithic platforms such as GlobalFoundries Fotonix the transistors sit on the same die as the optics. Silicon nitride is used alongside silicon where lower loss or shorter wavelengths are needed.
The platform has two structural gaps. Silicon has no linear electro-optic (Pockels) effect, so modulation relies on carrier depletion or thermal tuning, which limits speed, linearity and energy. And silicon’s indirect bandgap means no on-chip laser. Both gaps are being closed by bonding or printing other materials onto the same wafer: thin-film lithium niobate (TFLN) and barium titanate for modulators ref ref, III-V quantum-dot gain sections for 1.3 um lasers, phase-change films such as Sb2Se3 for non-volatile reconfiguration, and even BiCMOS electronic chiplets printed directly onto the photonic die. Micro-transfer printing has emerged as the wafer-scale vehicle for this.
Beyond datacom, the same fabrication base is being reused for mid-infrared biosensing in germanium-on-silicon, hardware security primitives, quantum-graph physics platforms, and optical computing architectures including microring ROM lookup engines and fully optical convolutional networks. These derivative uses are at very different maturities from the interconnect use case and should not be scored together.
Evidence base
- 22 April 2026: 320 Gb/s unamplified transmission using a 100 GHz germanium photodiode and a TFLN Mach-Zehnder modulator on a foundry-compatible silicon photonics platform at imec, indexed as evidence for multi-platform coexistence rather than convergence ref.
- 29 May 2026: TFLN micro-transfer printing across four full 200 mm silicon photonics wafers with 3-sigma placement accuracy down to 420 nm, printing yield above 95 per cent, insertion loss below 2 dB over 600 phase modulators and a 4 V half-wave voltage.
- Published 28 November 2025: a BiCMOS electronic chiplet of 0.06 mm2 printed directly onto a silicon photonic IC gave 224 Gb/s PAM-4 at minus 5.2 dBm OMA sensitivity (BER 2.4e-4) and 0.51 pJ/b.
- Published 7 May 2026: a monolithic receiver front end in the GlobalFoundries Fotonix platform achieved 28.9 GHz bandwidth, 61.7 dBohm gain, validation to 64 GBaud and 0.08 pJ/bit from 9.22 mW at 1.2 V.
- 28 May 2026: wafer-scale integration of lithium niobate modulators on silicon photonics via micro-transfer printing shown to be feasible only theoretically, using fabrication-variation data from a dedicated pilot line.
- Published 2 March 2026: mid-infrared germanium-on-silicon waveguide sensing of phenytoin reached a 2.20 mg/L limit of detection against a 10 to 20 mg/L therapeutic window, validating silicon photonics for biomedical infrared spectroscopy.
Open questions
- Does the 95 per cent micro-transfer-printing yield and sub-2 dB insertion loss hold across hundreds of wafers rather than four, and what is the resulting known-good-die cost penalty versus monolithic silicon modulators?
- Can a CMOS-compatible 220 nm silicon waveguide III-V quantum-dot laser be demonstrated experimentally, or does on-chip gain continue to require non-standard silicon thicknesses?
- Do the simulated coherent CPO figures (400 Gb/s offset-QAM-16 at 9.65 dBm laser power) survive fabrication in a commercial process, or does thermal drift in microring modulators erode the link budget?
- What is the measured energy-per-bit and cost advantage of silicon photonic chip-to-chip links over electrical I/O at equivalent reach, net of reconfiguration overhead in circuit-switched topologies?
Assessment drafted 2026-08-31 from up to 18 KB sources using the technology-scorecard framework; scores are a draft read pending review.