Decode chips

Kepler Computing · Taalas · ExpectedIT · Groq · Cerebras Systems · d-Matrix · Tenstorrent · EnCharge AI · Mythic · Rain AI · Sagence AI · Axelera AI · Untether AI · LAXNAR AI · Witinmem · Areanna · ChangXin Memory Technologies · Lightmatter · Houmo.ai · MetaX · Sapeon · Calligo Technologies · Tachyum · Iluvatar CoreX · Zhonghao Xinying · Kunlunxin · Cornelis Networks · MatX · NeuReality · Moffett AI · Moore Threads · Tensordyne · Preferred Networks · Positron AI · Biren Technology · NextSilicon · Ceremorphic · Vastai · Habana Labs (Intel Gaudi) · Sophgo · Global Unichip · Lemurian Labs · Myrtle.ai · Neo Semiconductor · Numem · AistarTek · Articron · CyberSwarm · CYRAN AI Solutions · femtoAI · Floadia Corporation · HyperAccel · InnoStar · Mentium Technologies · Mingxin Qirui · Pimchip · PIMIC · Pingxin Technology · Tetramem · XCENA · Yizhu Technology · Zhixin Micro · SambaNova Systems

• 22 Oct 2026A $6.2B valuation on an inference-chip company with no disclosed customer is a bet on the category, not a measurement of it.
• 9 Aug 2026Watch what the memory industry does in the weeks it is showing off. The route-arounds on display all keep the expensive memory and shorten, cheapen or pool the link to it. That is the competition an architecture betting on removing the memory entirely actually faces, and it ships on known process technology.
• 31 Jul 2026Decode is splitting into two products, not one: fast tokens (which now buy reasoning inside a fixed wait) and cheap tokens (which come from batching). Almost every challenger is racing for the cheap end. The interesting structural claim is that compute-in-memory need not choose, because with no weight fetch there is nothing for batching to amortise, and cost per token goes flat. Whether that is real turns entirely on whether an array can be made dense enough to hold a whole frontier model.
• 31 Jul 2026Everyone building around the memory bottleneck has moved the model weights somewhere cheaper and left the conversation memory exactly where it was. Only one company, a memory maker rather than a startup, is building silicon aimed at the second problem.
• 31 Jul 2026The most concrete evidence yet that memory-light inference silicon can win real production sockets: a chip company outside the two incumbents signed a $50m order with a hyperscaler cloud for servers that deliberately use ordinary phone memory instead of the scarce high-bandwidth kind. Its bet is not exotic memory but getting over 90% utilisation out of cheap memory where GPUs manage under 30%. Worth watching because the silicon that ships today is still FPGA-based and the custom chip does not tape out until late this year.
• 31 Jul 2026The best-funded challenger to Nvidia inference economics is no longer trying to remove HBM — it pools HBM and SRAM across the whole rack, and its newest investor is the HBM maker itself. The memory wall is being architected around, not removed, and the memory industry is buying equity in the workaround.
• 29 Jul 2026Someone simulated an AI accelerator where the maths is done with light and found it drew three watts, while the memory feeding it drew twenty. That ratio is the argument for every chip design trying to avoid high-bandwidth memory: the expensive part is moving the weights, not multiplying them, and changing what does the multiplying leaves most of the bill untouched.
• 29 Jul 2026A lot of "no HBM" accelerators only remove the weights from the memory bottleneck. The KV cache grows with every token by construction, so it cannot live in a static analog weight, and at long context it is the larger bandwidth problem. The right question for any HBM-free claim is its KV bandwidth at target context length, not how it stores weights.
• 17 Jul 2026Nearly marked this one down. Linear attention means less memory bandwidth per token, so the HBM window looked like it was closing early. Except the model needs 64 accelerators to run and sparsity is what makes it economic, so the volume climbs anyway. Volume holds, what you're paying for shifts, capacity not bandwidth.
• 16 Jul 2026Two more war chests landed this quarter on chips designed to serve model output without leaning on scarce high-bandwidth memory. The bet underneath is the same one: memory scarcity, not compute, sets the price of AI inference for the next few years.
• 3 Jul 2026The primary commercial argument for HBM-light inference silicon is increasingly cost, not performance headroom. With HBM stack prices on a steep upward trajectory from HBM3 through HBM4 and beyond, the economics of sub-$200/month cloud inference create a genuine pull for alternative memory architectures, independent of whether those alternatives close the raw bandwidth gap. As of mid-2026 the investor narrative around in-memory and analog compute remains underdeveloped even among sophisticated allocators, which means the scarcity-and-cost window is live but the consensus trade is not yet crowded. The investability filter still hinges on whether a given design addresses the decode/retrieval bandwidth constraint specifically, not just the headline HBM cost curve.
• 23 Jun 2026Memory is getting dramatically more expensive (Jefferies: +40-50% next quarter) and AI labs are signing direct supply pacts to lock it up - the squeeze that makes do-more-with-less-memory silicon commercially interesting is intensifying.
• 17 Jun 2026The independent low-power AI-chip field is not beating the memory giants at the edge; it is being bought up or quietly migrating to datacentre inference where the scarcity money is. "Routing around the memory bottleneck" is turning out to be an acquisition pitch more than a displacement one.