Dennard and colleagues (IBM, 1974) observed that as a transistor shrinks, you can scale voltage and current down with its dimensions so that power density stays roughly constant. The practical consequence: each new process node gave you more transistors AND more performance at the same power and cost. This, not Moore’s Law alone, is what made five decades of “faster every year for free” possible.
Why it ended
Dennard scaling broke down around 2005 to 2007. Below roughly 1 volt, threshold voltage and leakage current stopped cooperating: you could keep shrinking transistors (density continued), but you could no longer drop voltage proportionally, so power density started rising. The industry’s response was to stop chasing single-thread frequency and go multicore, which led to “dark silicon” (more transistors than you can power on at once).
Why it matters here
The end of Dennard scaling is the precise sense in which “Moore’s Law stopped paying”: transistors kept shrinking, but the free performance-per-watt gains stopped. With logic no longer getting cheaper to run, the binding constraint migrated to data movement and the The Memory Wall. That migration is what the post-Moore architecture landscape is built to attack.