Physics / mechanism
Analog computing encodes information as continuous physical quantities—voltage, current, charge, optical intensity—rather than discrete bits. Computation occurs via physical law: matrix-vector multiplication maps directly onto Kirchhoff’s current law in resistive crossbar arrays, or onto interference in photonic meshes. Key parameters: energy-per-MAC (multiply-accumulate), precision (typically 4–8 effective bits vs. digital’s 32), throughput density, and drift/noise floors. State of the art: memristor crossbars demonstrate sub-fJ/MAC at 8-bit equivalent precision; analog photonic accelerators (MIT, Lightmatter) hit >TOPS/W at inference workloads. Core limitation is weight-programming accuracy and device-to-device variability, both active research targets.
Competitive landscape
Digital ASIC accelerators (Tenstorrent, Groq, Cerebras) dominate on programmability and precision; neuromorphic (Intel Loihi, IBM NorthPole) overlaps on event-driven, low-power inference. Photonic digital interconnect is adjacent but distinct. In-memory computing (SRAM/DRAM analog) competes at the edge.
| Approach | Energy/MAC | Precision | Programmability |
|---|---|---|---|
| Analog crossbar | <1 fJ | 4–8 bit | Low |
| Digital ASIC | ~1–10 pJ | 8–32 bit | High |
| Analog photonic | <0.1 pJ | ~6 bit | Medium |
Companies using
Connected ideas
Sources
Frontier (open questions)
Merged from root duplicate (analog-computing.md at concepts/ root, 2026-06-10)
Analog / In-Memory Computing
Performing the multiply-accumulate of neural inference inside the memory array (memristor, SRAM, capacitor or flash crossbars) rather than shuttling data to a digital ALU, trading numerical precision for a large energy-per-MAC win. The architectural answer to the memory-bound-AI problem that Memcapacitor Compute Memory Bound Ai and Hbm Free Inference Architectures bet on; adjacent to but distinct from digital Processing-in-Memory (PIM).