The mechanism
Analog CIM does the multiply-accumulate (MAC) inside the memory array, in the analog domain — that part is genuinely cheap (see Charge-Domain Compute). But the analog result has to be converted back to digital before it can be used by the next layer, accumulated, or moved. That conversion is done by analog-to-digital converters (ADCs) at the periphery of each array column, plus digital-to-analog converters (DACs) to drive inputs in.
ADCs are expensive in exactly the dimensions analog CIM is trying to win:
- Energy. A precise ADC can consume more energy per conversion than the entire analog MAC it is reading. Across a large array, ADCs routinely account for the majority (often cited as 50–90%) of total tile energy.
- Area. ADCs are large relative to bitcells, so they cap how much of the die is actually compute.
- Precision scaling. ADC cost grows steeply with bit-precision (~2× energy per extra bit). Getting to 8-bit-equivalent accuracy — which most production models need — is where the cost explodes.
Why it is the load-bearing risk
How the leaders address it
The test to apply
Before accepting any analog-CIM efficiency claim: demand a full-chip, ADC-inclusive, 8-bit (or stated-precision) TOPS/W, ideally third-party measured. If a vendor only quotes array-level numbers, the ADC bottleneck has not been answered.