Why SRAM
The cost is density and volatility:
- An SRAM bitcell (6T, sometimes 8T/10T for CIM) is large compared with a 1T1R RRAM cell or a stacked memcapacitor. So SRAM-CIM stores fewer weights per mm².
- SRAM is volatile — it loses state on power-off and burns standby leakage to hold weights. For always-on edge inference that is a real penalty; for plugged-in datacentre decode it matters less.
Analog vs digital SRAM-CIM
Where it sits against memcapacitor
SRAM-CIM and memcapacitor are the two charge-friendly CIM bets, and they trade off cleanly:
The honest read: SRAM-CIM is the safer, better-funded path to volume; memcapacitor is the higher-ceiling, higher-risk path that wins only if 3D monolithic growth yields. See Memcapacitor Compute Memory Bound Ai for the device-class survival question.