Wide-bandgap (WBG) semiconductors are materials with an electronic bandgap substantially larger than silicon (1.12 eV). The conventional threshold is bandgap ≥ 2 eV; the term “ultra-wide-bandgap” (UWBG) typically denotes ≥ 4 eV. The defining consequence of a wider bandgap is a higher electric breakdown field — scaling approximately as the square of the bandgap — which allows WBG devices to block high voltages in a much thinner, lower-resistance semiconductor layer than silicon. This translates directly into higher power density, lower switching losses, and higher operating temperature.
The commercially dominant WBG materials are Silicon Carbide (SiC, 3.26 eV) and Gallium Nitride (GaN, 3.4 eV). SiC owns the high-voltage power segment (>650V, EV traction, industrial drives) driven by Sic Ev Traction Dominance; GaN owns sub-650V high-frequency switching (AI datacentre PSUs, fast chargers, 5G RF) as tracked by Gan Power Datacentre. Both SiC and GaN have mature foundry ecosystems, growing from 150mm to 200mm wafers.
The nitride alloy family extends the coverage: Aluminium Gallium Nitride (AlGaN, up to 6.2 eV) enables UV-C emitters and the 2DEG heterojunction that underlies GaN HEMTs; Indium Gallium Nitride (InGaN, 0.7–3.4 eV) spans the visible spectrum and is the active region of all blue/green LEDs. The UWBG frontier includes gallium oxide (Ga₂O₃, ~4.9 eV) and aluminium nitride (AlN, ~6.2 eV), which remain pre-commercial.
Investment relevance: WBG is a definitional shift in power and RF semiconductors — not a niche play. The enabling manufacturing technology is MOCVD (see MOCVD / MBE). Substrate cost and crystal defect density are the near-term competitive moats.
Frontier
- Can ultra-wide-bandgap materials (AlN, Ga₂O₃, diamond) move from lab to commercially manufacturable devices before 2030?
- Will WBG substrates (SiC, GaN boule) ever reach silicon-scale wafer economics, or will material cost permanently cap WBG to premium applications?
- Does WBG device integration into standard CMOS packaging unlock a new architecture for AI compute racks beyond the current discrete power stage?