UALink (Ultra Accelerator Link)

Cross-cuts: Manufacturing
last updated 2026-06-22
Co-Packaged OpticsUALink (Ult…

The open scale-up standard — the consortium answer to NVIDIA’s proprietary NVLink/NVSwitch at the rack-scale GPU-to-GPU tier. The contested heart of the Scale Up Interconnect thesis: real spec, credible members, but silicon is late and the camp is fragmented. Distinct from scale-OUT standards (Ultra Ethernet / UEC).

What it is

A memory-semantic load/store interconnect for connecting accelerators into one coherent pod, governed by the UALink Consortium. Spec: UALink 200G 1.0 ratified 8 April 2025 — 200 Gbps/lane, 800 Gbps/port, up to 1,024 accelerators per pod. (UALink 2.0 shipped before any 1.0 merchant silicon — spec-ahead-of-silicon while NVLink ships in volume.)

Members + silicon

The honest read

Open standards historically win eventually on cost/ubiquity (Ethernet, PCIe), but only after the incumbent harvests the high-margin years — and every prior win had a cheap good-enough merchant chip at the moment of decision. UALink has the spec and the consortium but not the silicon when buyers chose 2026 racks, the “open” banner is split three ways, and NVIDIA’s NVLink Fusion + its $2B Marvell stake (Mar 2026) were designed to drain UALink’s urgency. Realistic 2-3yr outcome: coexistence, not displacement — NVLink keeps the integrated-rack crown; open scale-up takes a slice among custom-accelerator hyperscalers. Fade “UALink wins” (~30%).

Sources

Built 2026-06-22 as part of the Scale Up Interconnect thesis.

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