A magnetic tunnel junction is a nanoscale stack of two magnetic films separated by a thin MgO barrier whose resistance depends on their relative magnetisation, and it is both the working bit of MRAM and, increasingly, a general-purpose primitive for random number generation, timekeeping, sensing and analog computing.
Summary
A magnetic tunnel junction (MTJ) is a sandwich: a fixed (reference) ferromagnetic layer, a tunnel barrier a few atoms thick (in the dominant technology, MgO), and a free ferromagnetic layer whose magnetisation can be flipped. Electrons tunnel through the barrier at a rate that depends on whether the two magnetic layers are parallel or antiparallel, so the device has two resistance states that persist without power. The size of that difference is the tunnel magnetoresistance (TMR) ratio; a recent voltage-driven device reports TMR up to 160% surviving a 400 C post-anneal, which is the temperature budget for back-end-of-line CMOS integration. Because reading is just a resistance measurement and the state is non-volatile, the MTJ is the storage element in spin-transfer torque magnetic RAM (STT-MRAM), where it is described as the fundamental building block.
The engineering problem is writing, not reading. Several mechanisms compete. Spin-transfer torque (STT) passes spin-polarised current through the barrier. Spin-orbit torque (SOT) injects spin from an adjacent heavy-metal line in a three-terminal cell, which is faster and separates read from write, and is the route being pushed for cache-level memory; its limitation is charge-to-spin conversion efficiency, around 45% today against a projected ~80% needed to match the current drive of advanced transistor nodes. Voltage-controlled magnetic anisotropy (VCMA) uses an electric field rather than current, and interface doping with iridium near the MgO/CoFeB interface has produced 3.5 fJ per bit sub-nanosecond switching. Exotic routes exist too: radio-frequency pre-pulses that raise switching probability and allow shorter DC write pulses, and single-shot all-optical switching demonstrated in CoFeB/MgO stacks and read out via TMR in a micro-scale device.
The parameters that decide an MTJ are therefore: TMR ratio (read margin), resistance-area (RA) product (which sets whether VCMA, STT or Joule heating dominates the switching physics), switching energy and pulse width, write error rate, thermal stability of the free layer, footprint, and thermal budget compatibility. Write error rate is not a smooth function of current: a non-monotonic “ballooning” anomaly has been reproduced in 20 nm and 50 nm micromagnetic models and attributed to interfacial Dzyaloshinskii-Moriya interaction driving incoherent, multi-domain reversal.
Evidence base
- 2025-11-22: interface Ir doping near the MgO/CoFeB interface gives voltage-driven MTJ switching at 3.5 fJ per bit in the sub-nanosecond regime with TMR up to 160% after 400 C annealing
- 2026-05-26: SOT-MTJ charge-to-spin conversion reaches about 45% against a projected ~80% requirement; Ta/W bilayers show a four-fold larger torque contribution than the spin Hall effect in Ta alone and were integrated into three-terminal SOT-MTJ devices
- 2025-09-16: superparamagnetic MTJs generate 0.5 to 1 Gb/s per device and stochastic-write MTJs above 0.1 Gb/s, both NIST SP800 validated, in footprints below 0.01 um2 and compatible with standard CMOS MTJ flows
- 2026-07-28: FLINT reads elapsed time from stochastic retention loss of deliberately broken MTJs, validated against 21 fabricated devices, tracking over 15 minutes of off-time within 10% error for 1.03 uJ
- 2026-07-23: MgO-based MTJs show coexisting linear hysteresis-free magnetoresistance and non-volatile quasi-analogue memristive switching down to nanosecond pulses, with barrier doping cutting memristive power by 20%
- 2025-11-13: micromagnetic simulations of 20 nm and 50 nm MTJs reproduce the non-monotonic ‘ballooning’ write error rate anomaly via interfacial DMI promoting incoherent, multidomain reversal
- 2025-10-29: single-shot all-optical switching demonstrated in rare-earth-free CoFeB/MgO MTJs with reversal detected via TMR in a micro-scale device
Open questions
- Does the ~45% to ~80% charge-to-spin conversion gap in SOT-MTJ close via orbital-torque materials such as Ta/W, or does cache-level SOT-MRAM stall on write current delivery?
- Is the DMI-driven ‘ballooning’ write error rate anomaly confirmed experimentally at 20 nm and below, and can it be engineered out without sacrificing thermal stability?
- Can 3.5 fJ per bit VCMA switching with 160% TMR be reproduced across a full array with tight distributions, given that defect-driven write-time scatter is large enough to build a PUF from?
- Do the simulation-stage applications (multistate MRAM synapses with oscillator neurons, faster p-bit random telegraph noise) survive contact with fabricated hardware?
Assessment drafted 2026-08-31 from up to 18 KB sources using the technology-scorecard framework; scores are a draft read pending review.