Physics / mechanism
Materials and process engineering defines the physical boundary conditions of every device. At its core: deposition (CVD, ALD, PVD, MBE), etch (RIE, DRIE, wet), doping (ion implantation, diffusion), and planarization (CMP) control film composition, thickness, stress, and interface quality. Key parameters are carrier mobility, dielectric constant (k), breakdown field, thermal conductivity, and defect density. CMOS front-end nodes push gate-oxide EOT below 0.5 nm; advanced packaging moves to hybrid bonding with Cu-Cu interconnects at <1 µm pitch. Compound semiconductors (GaN, SiC, InP, GaAs) operate at breakdown fields 3–10× silicon, enabling RF, power, and photonic applications inaccessible to bulk Si.
Competitive landscape
GaN-on-Si competes with SiC for power switching below 1.2 kV; SiC dominates above. InP competes with silicon photonics for coherent optical links above 400G where loss and modulation bandwidth matter. ALD competes with MOCVD for conformal high-k deposition in 3D geometries. Novel material classes—2D materials (MoS₂, hBN), perovskites, diamond—are pre-commercial but threaten incumbent materials at specific performance nodes.
| Approach | Strength | Weakness |
|---|---|---|
| SiC power | High voltage, mature fab | Cost, wafer size |
| GaN-on-Si | CMOS-compatible, cost | Reliability at high voltage |
| Silicon photonics | Ecosystem, scale | Modulator efficiency, laser integration |
Companies using
Connected ideas
Sources
Frontier (open questions)
- To be added.