Physics / mechanism
Electronic Design Automation encompasses the software stack that converts circuit intent into manufacturable geometry. At the transistor level, SPICE-derived solvers model device physics (IV curves, parasitics, noise) against PDK-supplied foundry models. At the physical level, place-and-route engines minimize wirelength and timing slack under DRC constraints encoded in technology files. Modern signoff flows close multiple corners simultaneously: timing (STA), power (IR drop, EM), signal integrity, and DFM. State-of-the-art tools now embed ML-assisted prediction (Synopsys DSO.ai, Cadence Cerebrus) to navigate the optimization space faster than classical engines. Key metrics: PPA (power, performance, area), closure time, and PDK coverage across nodes from 3 nm to mature 180 nm geometries.
Competitive landscape
Market structure & investment angles
The market is an effective triopoly: Synopsys ($6B revenue), Cadence ($4B), Siemens EDA (Mentor legacy). ANSYS anchors multiphysics simulation. Emerging challengers target specific wedges — OpenROAD for open-source RTL-to-GDS, Luminous Computing / Photon Design for photonic EDA, Luceda / Lumerical (Ansys) for PIC-specific flows. AI-native startups (Quilter, Jeda AI, Ricursive Intelligence ($300M/$4B)) attack specific bottlenecks.
| Player | Wedge | Risk |
|---|---|---|
| Synopsys / Cadence | Full-stack, all nodes | Switching cost moat |
| Lumerical / Luceda | Photonic IC design | PDK coverage thin |
| OpenROAD | Cost, transparency | Support / signoff gap |
| Ricursive Intelligence | AI-native design (AlphaChip lineage) | US-only, $4B entry |
Photonics and advanced-materials companies hit EDA friction immediately: photonic PDKs are immature, co-simulation of electronic-photonic systems (EPDA) has no dominant toolchain, and GF’s silicon photonics PDK (45SPCLO) requires bespoke flows. Opportunity angles — vehicle-agnostic: EPDA tooling, PDK-as-a-service, AI-assisted verification for compound semiconductor processes where SPICE models are poorly characterised, open/sovereign EDA flows priced near-zero (counter-positions the Big-3 seat-license model). Public-markets expression: CDNS, SNPS. Pre-seed: European open-EDA / sovereign-tooling plays (see Eda Chip Design for the full theme read).
Companies using
Connected ideas
Sources
Frontier (open questions)
- To be added.