Physics / mechanism
Semiconductor equipment encompasses the machines used to fabricate, inspect, and test integrated circuits — spanning lithography, deposition, etch, metrology, and ion implantation. Lithography (ASML EUV at 13.5 nm wavelength, ~$380M per High-NA system) defines the patterning floor; CVD/ALD tools deposit films at atomic precision (sub-Å thickness control); plasma etch defines feature geometry at <2 nm tolerances. The equipment market runs ~$110B annually, growing ~8% CAGR, dominated by ASML (litho), Applied Materials, Lam Research, and KLA (process control). Leading-edge nodes (3 nm/2 nm) require >1,000 process steps, making equipment yield and uptime existential for fabs.
Competitive landscape
The primary competitive axis is incumbency: ASML’s EUV monopoly is essentially uncontestable near-term. Competition lives in adjacent subsystems — electron-beam multi-column inspection (competing with KLA optical), atomic layer etch vs. plasma etch for high-aspect-ratio features, and cryo-etch for advanced 3D NAND. Emerging challengers include Mycronic (advanced packaging litho), Onto Innovation (metrology), and Chinese domestic players (AMEC, NAURA) closing the gap on mature nodes under export pressure. Photonics integration is pulling in wafer-bonding and hybrid integration tooling as a distinct sub-segment.
| Approach | Maturity | Threat level |
|---|---|---|
| EUV lithography | Production | Monopoly |
| Nanoimprint (Canon) | Early production | Niche |
| Chinese domestic etch/dep | Mature node | Rising |
Companies using
Connected ideas
Sources
Frontier (open questions)
- To be added.