Rack Scale Interconnect

last updated 2026-08-31

Physics / mechanism

Rack-scale interconnect covers the links that carry data between accelerators, switches and memory inside a single rack or a small group of adjacent racks, sitting between on-package/on-board wiring and campus-scale networking. In the taxonomy used here it is grouped under optical interconnect, reflecting the shift of these short-reach, high-bandwidth links from electrical backplanes and copper cabling towards optical media as aggregate bandwidth per rack rises.

The supplied source material does not describe device physics, modulation formats, reach, energy per bit, or channel counts for this concept. What it does establish is the commercial context: interconnect is named as one of two components of a continuing datacentre-infrastructure investment wave, alongside higher-voltage power delivery ref. The pairing is itself informative, since interconnect bandwidth and power delivery are the two rack-level constraints that scale together as accelerator density increases.

Beyond that, no parameters can be stated from the sources without extrapolation.

Competitive landscape

The sources do not support a comparison between rack-scale interconnect approaches (for example copper versus co-packaged optics versus pluggable optics, or between competing switch fabrics). The only positioning available is that interconnect belongs to the datacentre-infrastructure segment of semiconductor startup funding, which continued through Q2 2026 while edge silicon re-emerged and AI hardware remained the dominant category ref.

Evidence base

Frontier (open questions)

Synthesised 2026-08-31 from 1 KB sources by the resynth pipeline; citations are KB source slugs.

Recent mentions

Frontier questions