Physics / mechanism
Photonic EDA is the design-automation layer for photonic integrated circuits: the process design kits (PDKs), component libraries and simulation/layout tooling that let a designer target a specific fabrication process without owning it. In electronics the equivalent layer is a commodity, supplied by foundries and third-party tool vendors; in photonics the sources address it as an open question of who occupies the neutral PDK/EDA layer for heterogeneous integration.
The company’s self-description, “fabless with a captive process”, with an analogy to MEMS and InvenSense-style fabless-with-process-IP at specialty foundries, marks out a distinct business shape from both pure-play foundry and asset-light PDK licensing. Under this model the process can still run on someone else’s wafer line: SHIP is stated by the company to run in production volume on Tower’s 200 mm lines. Access to the fab, therefore, is not the same as access to the PDK.
Competitive landscape
The sources establish that at least one prominent heterogeneous-integration process is explicitly not a PDK play, which narrows rather than fills the neutral-layer slot. Who does occupy that layer remains the open research question in the source itself.
Evidence base
Frontier (open questions)
- Which organisations, if any, currently offer a third-party-accessible PDK for heterogeneous photonic integration, and on what commercial terms?
- Does a captive-process model measurably slow or accelerate time-to-volume compared with an open-PDK model on the same foundry line?
- Can a neutral EDA layer support device models across multiple heterogeneous integration flows, or are models tied to a single patented process?
- What design-rule and model fidelity is required before third-party photonic designers achieve first-pass tape-out success on a heterogeneous flow?
Synthesised 2026-08-31 from 2 KB sources by the resynth pipeline; citations are KB source slugs.