Physics / mechanism
Compute & logic encompasses the physical implementation of Boolean and non-Boolean operations in silicon and beyond. Classical CMOS logic operates by switching FETs between conducting and non-conducting states; key parameters are switching energy (~1 fJ/operation at 3 nm node), propagation delay, leakage current, and transistor density (~170M transistors/mm² at TSMC N3). State of the art: gate-all-around (GAA) nanosheet FETs entering HVM, backside power delivery reducing IR drop, and CFET stacking pushing density further. Beyond CMOS: ferroelectric FETs, tunnel FETs, and spintronic devices remain pre-production but attack the energy-per-operation wall that Dennard scaling no longer solves.
Competitive landscape
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Frontier (open questions)
- To be added.